a) Field of the Invention
The present invention relates to a liquid crystal display (LCD) and a testing method thereof.
b) Description of Related Art
A typical liquid crystal display (LCD) includes two panels and a liquid crystal (LC) layer having dielectric anisotropy. The LC layer is interposed between the two panels. A desired image is realized at an LCD by adjusting transmittance of light passing though the LC layer, and the adjustment of transmittance is achieved by varying the strength of an electric field applied to the LC layer. Such an LCD has become popular in the field of flat panel displays (FPDs), and a TFT-LCD that uses a thin film transistor (TFT) as a switching element has become the most common LCD.
One of the two panels has the TFTs formed thereon, and pluralities of gate lines and data lines respectively extend in row and column directions on the panel. The gate lines and data lines are connected to pixel electrodes through the TFTs. The TFTs control transmission of data signals to the pixel electrodes under the control of gate signals received through the gate lines.
The gate signals are produced at a plurality of gate driving integrated circuits (ICs). The gate driving ICs receive a gate-on voltage and a gate-off voltage from a driving voltage generator that has one or more DC/ DC converters, and combines them to produce the gate signals under the control of a signal controller. The data signals are produced at a plurality of data driving ICs that convert image signals of the signal controller to analog voltages.
The signal controller, the driving voltage generator, etc. are usually provided on printed circuit boards (PCBs) that are disposed to the outside of the panel, and the driving ICs are mounted on flexible printed circuit (FPC) films disposed between the panel and the PCBs. An LCD is usually provided with two PCBs, e.g., one disposed at an upper side of the panel, and another disposed at a left side thereof. The left one is usually called a gate PCB, and the upper one a data PCB. The gate driving ICs, being disposed between the gate PCB and the panel, receive signals from the gate PCB, and the data driving ICs, being disposed between the data PCB and the panel, receive signals from the data PCB.
Some LCDs include only the data PCB without the gate PCB. The gate side FPC films and the gate driving ICs mounted thereon may remain at their original positions. In this case, for signal transmission from the signal controller, the driving voltage generator, etc., to the gate driving ICs, additional signal lines are provided on data FPC films and the panels in addition to the gate FPC films.
Some LCDs have neither a gate PCB nor a gate FPC film. The gate driving ICs are mounted directly on one of the panels, and, in addition, the data driving ICs may also be mounted on the panel, which is called a chip-on-glass (COG) type. In this case, for signal transmission to the gate driving ICs, additional signal lines may be provided on the data FPC films and the panel. The data driving ICs mounted directly on the panel still receive signals via the data FPC film.
Visual inspection (VI) tests are executed for the test of the operation of an LCD. For VI tests of LCDs of such a COG type, inspection lines for the data driving ICs are additionally formed on the panel, and test pads for application of test signals to the inspection lines are formed between adjacent data driving ICs. The size of the test pads should be more than a predetermined dimension, e.g., 800 μm×800 μm, to ensure sufficient reliability of the VI test.
For the VI test of a COG type LCD, a plurality of connecting lines are usually formed between data driving ICs such that an image signal firstly applied to the leftmost data driving IC may be consecutively sent to all other data driving ICs through the connecting lines.
Therefore, in this case, the connecting lines, test pads, and inspection lines should be included in narrow regions between data driving ICs, but in general, such an arrangement of lines and pads for tests between data driving ICs is not optimal.
In more detail, in designing such an LCD, layout of the inspection lines and test pads are firstly determined between the data driving ICs, and subsequently, signal lines such as the connecting lines are designed at positions that do not interfere with the inspection lines and test pads. Accordingly, in general, the signal lines cannot have a linear pattern and they have many curves and windings, which lengthens the signal lines, which in turn increases wire resistance and signal delay such that signal transmission is mal-effected.